ASICs (application specific integrated circuits) are becoming more and more complex with multi-million gates. Due to low power requirements, chips are reduced in size, making it prone to soft errors due to interface from alpha particles or neutrons emitted by packaging materials and cosmic rays. Soft errors are glitches in devices and occur when a logic state from “1” as initially written to “0” or vice versa. Soft errors cause no permanent damage. However, soft errors can limit the reliability of hardware devices.
The technology trend has been to go towards even more reduced geometry (20 nm, 14 nm, etc., integrated circuits), which makes soft error problems worse. Conventionally, memories on chip have used techniques such as ECC (error correction code), CRC (cyclic redundancy check) and LDPC (low density parity check) to detect and recover from such errors. However, apart from memories, ASICs contain a large amount of programming state in flip-flops. This state, in control registers, is programmed initially by software and controls how devices operate. Unlike pipelines and dynamic content, this state rarely changes and stays static, which makes this state even more vulnerable to soft errors as once soft error occurs, no corrective actions can be taken. Soft errors are extremely dangerous as they can alter the way a device is operating.